COMPUTER SYSTEM ARCHITECTURE MCQS PART 14
1. Virtual memory consists of _______.
A. Static RAM
B. Dynamic RAM
C. Magnetic memory
D. None of these
Ans: A
2. In signed-magnitude binary division, if the dividend is (11100)2 and divisor is(10011)2 then the result is ______.
A. (00100)2
B. (10100)2
C. (11001)2
D. (01100)2
Ans: B
3. Generally Dynamic RAM is used as main memory in a computer system as it______.
A. Consumes less power
B. has higher speed
C. has lower cell density
D. needs refreshing circuitry
Ans: B
4. Write Through technique is used in which memory for updating the data_____.
A. Virtual memory
B. Main memory
C. Auxiliary memory
D. Cache memory
Ans: D
5. Cache memory acts between_______.
A. CPU and RAM
B. RAM and ROM
C. CPU and Hard Disk
D. None of these
Ans: A
6. The circuit used to store one bit of data is known as ______.
A. Encoder
B. OR gate
C. Flip Flop
D. Decoder
Ans: C
7. Von Neumann architecture is ______.
A. SISD
B. SIMD
C. MIMD
D. MISD
Ans: A
8. In a vectored interrupt.
A. the branch address is assigned to a fixed location in memory.
B. the interrupting source supplies the branch information to the processor through an interrupt vector.
C. the branch address is obtained from a register in the processor
D. none of the above
Ans: B
9. . In a memory-mapped I/O system, which of the following will not be there?
A. LDA
B. IN
C. ADD
D. OUT
Ans: A
10. If memory access takes 20 ns with cache and 110 ns without it, then the ratio(cache uses a 10 ns memory) is _____.
A. 93%
B. 90%
C. 88%
D. 87%
Ans: B
A. Static RAM
B. Dynamic RAM
C. Magnetic memory
D. None of these
Ans: A
2. In signed-magnitude binary division, if the dividend is (11100)2 and divisor is(10011)2 then the result is ______.
A. (00100)2
B. (10100)2
C. (11001)2
D. (01100)2
Ans: B
3. Generally Dynamic RAM is used as main memory in a computer system as it______.
A. Consumes less power
B. has higher speed
C. has lower cell density
D. needs refreshing circuitry
Ans: B
4. Write Through technique is used in which memory for updating the data_____.
A. Virtual memory
B. Main memory
C. Auxiliary memory
D. Cache memory
Ans: D
5. Cache memory acts between_______.
A. CPU and RAM
B. RAM and ROM
C. CPU and Hard Disk
D. None of these
Ans: A
6. The circuit used to store one bit of data is known as ______.
A. Encoder
B. OR gate
C. Flip Flop
D. Decoder
Ans: C
7. Von Neumann architecture is ______.
A. SISD
B. SIMD
C. MIMD
D. MISD
Ans: A
8. In a vectored interrupt.
A. the branch address is assigned to a fixed location in memory.
B. the interrupting source supplies the branch information to the processor through an interrupt vector.
C. the branch address is obtained from a register in the processor
D. none of the above
Ans: B
9. . In a memory-mapped I/O system, which of the following will not be there?
A. LDA
B. IN
C. ADD
D. OUT
Ans: A
10. If memory access takes 20 ns with cache and 110 ns without it, then the ratio(cache uses a 10 ns memory) is _____.
A. 93%
B. 90%
C. 88%
D. 87%
Ans: B
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