COMPUTER SYSTEM ARCHITECTURE MCQS PART 87
1. ________interrupt establishes a priority over the various sources to determine which request should be entertained first:
a. Priority interrupt
b. Polling
c. Daisy chaining
d. None of these
ANSWER A
2. _____method is used to establish priority by serially connecting all devices that request an interrupt:
a. Polling
b. Daisy chaining
c. Priority
d. None of these
ANSWER B
3. In daisy chaining device 0 will pass signal only if it has:
a. Interrupt request
b. No interrupt request
c. Both a & b
d. None of these
ANSWER B
4. VAD stands for:
a. Vector address
b. Symbol address
c. Link address
d. None of these
ANSWER A
5. _______interrupt method uses a register whose bits are set separately by interrupt signal for each device:
a. Parallel priority interrupt
b. Serial priority interrupt
c. Both a & b
d. None of these
ANSWER A
6. ______register is used whose purpose is to control status of each interrupt request in parallel priority interrupt:
a. Mass
b. Mark
c. Make
d. Mask
ANSWER A
7. The ANDed output of bits of interrupt register and mask register are set as input of:
a. Priority decoder
b. Priority encoder
c. Priority decoder
d. Multiplexer
ANSWER B
8. Which 2 output bits of priority encoder are the part of vector address for each interrupt source in parallel priority interrupt:
a. A0 and A1
b. A0 and A2
c. A0 and A3
d. A1 and A2
ANSWER A
9. Which technique is used that identifies the highest priority resource by means of software:
a. Daisy chaining
b. Polling
c. Priority
d. Chaining
ANSWER B
10. Which technique is used that identifies the highest priority resource by means of software:
a. Daisy chaining
b. Polling
c. Priority
d. Chaining
ANSWER B
a. Priority interrupt
b. Polling
c. Daisy chaining
d. None of these
ANSWER A
2. _____method is used to establish priority by serially connecting all devices that request an interrupt:
a. Polling
b. Daisy chaining
c. Priority
d. None of these
ANSWER B
3. In daisy chaining device 0 will pass signal only if it has:
a. Interrupt request
b. No interrupt request
c. Both a & b
d. None of these
ANSWER B
4. VAD stands for:
a. Vector address
b. Symbol address
c. Link address
d. None of these
ANSWER A
5. _______interrupt method uses a register whose bits are set separately by interrupt signal for each device:
a. Parallel priority interrupt
b. Serial priority interrupt
c. Both a & b
d. None of these
ANSWER A
6. ______register is used whose purpose is to control status of each interrupt request in parallel priority interrupt:
a. Mass
b. Mark
c. Make
d. Mask
ANSWER A
7. The ANDed output of bits of interrupt register and mask register are set as input of:
a. Priority decoder
b. Priority encoder
c. Priority decoder
d. Multiplexer
ANSWER B
8. Which 2 output bits of priority encoder are the part of vector address for each interrupt source in parallel priority interrupt:
a. A0 and A1
b. A0 and A2
c. A0 and A3
d. A1 and A2
ANSWER A
9. Which technique is used that identifies the highest priority resource by means of software:
a. Daisy chaining
b. Polling
c. Priority
d. Chaining
ANSWER B
10. Which technique is used that identifies the highest priority resource by means of software:
a. Daisy chaining
b. Polling
c. Priority
d. Chaining
ANSWER B
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