COMPUTER SYSTEM ARCHITECTURE MCQS PART 61
1. In register stack items are removed from the stack by using the ____operation:
a. Push
b. Pop
c. Both
d. None
ANSWER B
2. Which register holds the item that is to be written into the stack or read out of the stack:
a. SR
b. IR
c. RR
d. DR
ANSWER D
3. In register stack the top item is read from the stack into:
a. SR
b. IR
c. RR
d. DR
ANSWER D
4. In conversion to reverse polish notation the ____and____ operations are performed at the end:
a. Add and subtract
b. Subtract and multiplication
c. Multiplication and subtract
d. All of these
ANSWER A
5. RPN stands for:
a. Reverse polish notation
b. Read polish notation
c. Random polish notation
d. None of these
ANSWER A
6. Instruction formats contains the memory address of the______:
a. Memory data
b. Main memory
c. CPU
d. ALU
ANSWER B
7. In instruction formats instruction is represent by a________ of bits:
a. Sequence
b. Parallel
c. Both
d. None
ANSWER A
8. In instruction formats the information required by the ______ for execution:
a. ALU
b. CPU
c. RISC
d. DATA
ANSWER B
9. The operation is specified by a binary code known as the_____:
a. Operand code
b. Opcode
c. Source code
d. All of these
ANSWER B
10. Which are contains one or more register that may be referenced by machine instruction:
a. Input
b. Output
c. CPU
d. ALU
ANSWER C
a. Push
b. Pop
c. Both
d. None
ANSWER B
2. Which register holds the item that is to be written into the stack or read out of the stack:
a. SR
b. IR
c. RR
d. DR
ANSWER D
3. In register stack the top item is read from the stack into:
a. SR
b. IR
c. RR
d. DR
ANSWER D
4. In conversion to reverse polish notation the ____and____ operations are performed at the end:
a. Add and subtract
b. Subtract and multiplication
c. Multiplication and subtract
d. All of these
ANSWER A
5. RPN stands for:
a. Reverse polish notation
b. Read polish notation
c. Random polish notation
d. None of these
ANSWER A
6. Instruction formats contains the memory address of the______:
a. Memory data
b. Main memory
c. CPU
d. ALU
ANSWER B
7. In instruction formats instruction is represent by a________ of bits:
a. Sequence
b. Parallel
c. Both
d. None
ANSWER A
8. In instruction formats the information required by the ______ for execution:
a. ALU
b. CPU
c. RISC
d. DATA
ANSWER B
9. The operation is specified by a binary code known as the_____:
a. Operand code
b. Opcode
c. Source code
d. All of these
ANSWER B
10. Which are contains one or more register that may be referenced by machine instruction:
a. Input
b. Output
c. CPU
d. ALU
ANSWER C
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