COMPUTER SYSTEM ARCHITECTURE MCQS PART 54
1.
_______machine instruction creates branching to some specified location
in main memory if result of last ALU operation is Zero or Zero flag is
set:
a. Branch on One
b. Branch on Three
c. Branch on Nine
d. Branch on Zero
ANSWER D
2. Full form of CAR:
a. Control address register
b. Content address register
c. Condition accumulator resource
d. Code address register
ANSWER A
3. Two types of microinstructions are:
a. Branching
b. Non-branching
c. Both a & b
d. None of these
ANSWER C
4. Which are 3 ways to determine address of next micro instruction to be executed:
a. Next sequential address
b. Branching
c. Interrupt testing
d. All of these
ANSWER D
5. Branching can be________:
a. Conditional
b. Unconditional
c. Both a & b
d. None of these
ANSWER C
6. In which branching condition is tested which is determined by status bit of ALU:
a. Unconditional
b. Conditional
c. Both a & b
d. None of these
ANSWER B
7. which branch is achieved by fixing status bit that output of multiplexer is always one:
a. Unconditional
b. Conditional
c. Looping
d. All of these
ANSWER A
8. Which register is used to store addresses of control memory from where instruction is fetched:
a. MAR
b. BAR
c. CAR
d. DAR
ANSWER C
9. Control ROM is the control memory that holds:
a. Control words
b. Memory words
c. Multiplexers
d. Decoders
ANSWER A
10. Opcode is the machine instruction obtained from decoding instruction stored in:
a. Stack pointer
b. Address pointer
c. Instruction register
d. Incrementer
ANSWER C
a. Branch on One
b. Branch on Three
c. Branch on Nine
d. Branch on Zero
ANSWER D
2. Full form of CAR:
a. Control address register
b. Content address register
c. Condition accumulator resource
d. Code address register
ANSWER A
3. Two types of microinstructions are:
a. Branching
b. Non-branching
c. Both a & b
d. None of these
ANSWER C
4. Which are 3 ways to determine address of next micro instruction to be executed:
a. Next sequential address
b. Branching
c. Interrupt testing
d. All of these
ANSWER D
5. Branching can be________:
a. Conditional
b. Unconditional
c. Both a & b
d. None of these
ANSWER C
6. In which branching condition is tested which is determined by status bit of ALU:
a. Unconditional
b. Conditional
c. Both a & b
d. None of these
ANSWER B
7. which branch is achieved by fixing status bit that output of multiplexer is always one:
a. Unconditional
b. Conditional
c. Looping
d. All of these
ANSWER A
8. Which register is used to store addresses of control memory from where instruction is fetched:
a. MAR
b. BAR
c. CAR
d. DAR
ANSWER C
9. Control ROM is the control memory that holds:
a. Control words
b. Memory words
c. Multiplexers
d. Decoders
ANSWER A
10. Opcode is the machine instruction obtained from decoding instruction stored in:
a. Stack pointer
b. Address pointer
c. Instruction register
d. Incrementer
ANSWER C
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