DIGITAL ELECTRONICS MCQS PART 04
1.
When signed numbers are used in binary arithmetic, then which one of
the following notations would have unique representation for zero.
(A)Sign-magnitude.
(B) 1’s complement.
(C) 2’s complement.
(D) 9’s complement.
Ans: A
2. Which of following consume minimum power
(A)TTL.
(B) CMOS.
(C) DTL.
(D) RTL.
Ans: B
Explanation: CMOS consumes minimum power as in CMOS one p-MOS & one n-MOS transistors are connected in complimentary mode, such that one device is ON & one is OFF.
3. In digital ICs, Schottky transistors are preferred over normal transistors because of their
(A)Lower Propagation delay.
(B) Higher Propagation delay.
(C) Lower Power dissipation.
(D) Higher Power dissipation.
Ans: A
Explanation: Lower propagation delay as shottky transistors reduce the storage time delay by preventing the transistor from going deep into saturation.
4. The following switching functions are to be implemented using a Decoder:
f1 =)m(1, 2, 4, 8,10,14) f2 =) m(2, 5, 9,11) f3 =) m(2, 4, 5, 6, 7)
The minimum configuration of the decoder should be
(A) 2 – to – 4 line.
(B) 3 – to – 8 line.
(C) 4 – to – 16 line.
(D) 5 – to – 32 line.
Ans: C
Explanation: 4 to 16 line decoder as the minterms are ranging from 1 to 14.
5. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for change of state will be
(A) 15 ns.
(B) 30 ns.
(C) 45 ns.
(D) 60 ns.
Ans: A
Explanation: 15 ns because in synchronous counter all the flip-flops change state at the same time.
6. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are
(A) 1.
(B) 2.
(C) 4.
(D) 8.
Ans: D
Explanation: Because 8-bit words required 8 bit data lines.
7.The decimal equivalent of Binary number 11010 is
(A) 26.
(B) 36.
(C) 16.
(D) 23.
Ans: A Explanation: 11010 = 1 X 24 + 1 X 2 3 + 0 X 22 + 1 X 21 = 26
8. 1’s complement representation of decimal number of -17 by using 8 bit representation is
(A) 1110 1110
(B) 1101 1101
(C) 1100 1100
(D) 0001 0001
Ans: A
Explanation: (17)10 = (10001)2
In 8 bit = 00010001
1's Complement = 11101110
9.The excess 3 code of decimal number 26 is
(A) 0100 1001
(B) 01011001
(C) 1000 1001
(D) 01001101
Ans: B
Explanation: (26)10 in BCD is ( 00100110 ) BCD
Add 011 to each BCD 01011001 for excess – 3
10.How many AND gates are required to realize Y = CD+EF+G
(A) 4
(B) 5
(C) 3
(D) 2
Ans: D
Explanation: To realize Y = CD + EF + G
Two AND gates are required (for CD & EF).
(A)Sign-magnitude.
(B) 1’s complement.
(C) 2’s complement.
(D) 9’s complement.
Ans: A
2. Which of following consume minimum power
(A)TTL.
(B) CMOS.
(C) DTL.
(D) RTL.
Ans: B
Explanation: CMOS consumes minimum power as in CMOS one p-MOS & one n-MOS transistors are connected in complimentary mode, such that one device is ON & one is OFF.
3. In digital ICs, Schottky transistors are preferred over normal transistors because of their
(A)Lower Propagation delay.
(B) Higher Propagation delay.
(C) Lower Power dissipation.
(D) Higher Power dissipation.
Ans: A
Explanation: Lower propagation delay as shottky transistors reduce the storage time delay by preventing the transistor from going deep into saturation.
4. The following switching functions are to be implemented using a Decoder:
f1 =)m(1, 2, 4, 8,10,14) f2 =) m(2, 5, 9,11) f3 =) m(2, 4, 5, 6, 7)
The minimum configuration of the decoder should be
(A) 2 – to – 4 line.
(B) 3 – to – 8 line.
(C) 4 – to – 16 line.
(D) 5 – to – 32 line.
Ans: C
Explanation: 4 to 16 line decoder as the minterms are ranging from 1 to 14.
5. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for change of state will be
(A) 15 ns.
(B) 30 ns.
(C) 45 ns.
(D) 60 ns.
Ans: A
Explanation: 15 ns because in synchronous counter all the flip-flops change state at the same time.
6. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are
(A) 1.
(B) 2.
(C) 4.
(D) 8.
Ans: D
Explanation: Because 8-bit words required 8 bit data lines.
7.The decimal equivalent of Binary number 11010 is
(A) 26.
(B) 36.
(C) 16.
(D) 23.
Ans: A Explanation: 11010 = 1 X 24 + 1 X 2 3 + 0 X 22 + 1 X 21 = 26
8. 1’s complement representation of decimal number of -17 by using 8 bit representation is
(A) 1110 1110
(B) 1101 1101
(C) 1100 1100
(D) 0001 0001
Ans: A
Explanation: (17)10 = (10001)2
In 8 bit = 00010001
1's Complement = 11101110
9.The excess 3 code of decimal number 26 is
(A) 0100 1001
(B) 01011001
(C) 1000 1001
(D) 01001101
Ans: B
Explanation: (26)10 in BCD is ( 00100110 ) BCD
Add 011 to each BCD 01011001 for excess – 3
10.How many AND gates are required to realize Y = CD+EF+G
(A) 4
(B) 5
(C) 3
(D) 2
Ans: D
Explanation: To realize Y = CD + EF + G
Two AND gates are required (for CD & EF).
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