DIGITAL ELECTRONICS MCQS SET 08
1. Minimum number of 2-input NAND gates required to implement the function F = (x + y) (Z + W) is ………..
1. 3 2. 4 3. 5 4. 6
Answer: 2
2. Which device has one input and many outputs?
1. Multiplexer
2. Demultiplexer
3. Counter
4. Flip flop
Answer: 2
3. A carry look ahead adder is frequently used for addition because
1. it costs less 2. it is faster 3. it is more accurate
4. uses fewer gates
Answer: 2
1. 3 2. 4 3. 5 4. 6
Answer: 2
2. Which device has one input and many outputs?
1. Multiplexer
2. Demultiplexer
3. Counter
4. Flip flop
Answer: 2
3. A carry look ahead adder is frequently used for addition because
1. it costs less 2. it is faster 3. it is more accurate
4. uses fewer gates
Answer: 2
4. In register index addressing mode the effective address is given by ……..
1. index register value
2. sum of the index register value and the operand
3. operand
4. difference of the index register value and the operand
Answer: 2
1. index register value
2. sum of the index register value and the operand
3. operand
4. difference of the index register value and the operand
Answer: 2
5. 7BF16 = __________ 2
1. 0111 1011 1110 2. 0111 1011 1111 3. 0111 1011 0111
4. 0111 1011 0011
Answer: 2
6. Zero suppression is not used in actual practice.
1. True 2. False
Answer: 2
1. 0111 1011 1110 2. 0111 1011 1111 3. 0111 1011 0111
4. 0111 1011 0011
Answer: 2
6. Zero suppression is not used in actual practice.
1. True 2. False
Answer: 2
7.
A counter type A/D converter contains a 4 bit binary ladder and a
counter driven by a 2 MHz clock. Then conversion time is ………..
1. 8 μ sec b. 10 μ sec c. 2 μ sec d. 5 μ sec
Answer: 1
8. The hexadecimal number (3E8)16 is eual to decimal number ………1. 8 μ sec b. 10 μ sec c. 2 μ sec d. 5 μ sec
Answer: 1
1. 1000 2. 982 3. 768 4. 323
Answer: 1
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