OPERATING SYSTEM MCQS PART 14

OPERATING SYSTEM MCQS PART 14

1. A 12 bit ADC is used to convert analog voltage of 0 to 10 V into digital. The resolution is ……….
1. 2.44 mV            
2. 24.4 mV            
3. 1.2 V        
4. none of these
Answer : 1

2. A full adder can be made out of …………
1. two half adders   
2. two half adders and a OR gate
3. two half adders and a NOT gate           
4. three half adders
Answer : 2

3. The output of a half adder is ……….
1. Sum           
2. Sum and Carry     
3. Carry           
4. none of these
Answer: 2

4. Minimum number of 2-input NAND gates required to implement the function F = (x + y) (Z + W) is ………..
1. 3         
2. 4         
3. 5             
4. 6
Answer : 2

5. Which device has one input and many outputs?
1. Multiplexer   
2. Demultiplexer       
3. Counter   
4. Flip flop
Answer: 2
Explanation: Demultiplexer takes data from one line and directs it to any of its N output depending on the status of its select lines.

6. A carry look ahead adder is frequently used for addition because
1. it costs less        
2. it is faster  
3. it is more accurate  
4. uses fewer gates
Answer: 2

7. In register index addressing mode the effective address is given by
1. index register value
2. sum of the index register value and the operand
3. operand
4. difference of the index register value and the operand
Answer : 2
Explanation:
4 = 22, in up scaling digit will be shifted by two bit in right direction.

8. 7BF16 = __________
1. 0111 1011 1110   
2. 0111 1011 1111   
3. 0111 1011 0111
4. 0111 1011 0011
Answer : 2
Explanation:
7BF16 = 7 x 162 + 11 x 161 + 15 x 160 = 1983 in decimal = 0111 1011 1111 in binary.

9. Zero suppression is not used in actual practice.
1. True            
2. False
Answer: 2
Explanation: Zero suppression is commonly used.

10. A counter type A/D converter contains a 4 bit binary ladder and a counter driven by a 2 MHz clock. Then conversion time is ………..
1. 8 μ sec            
2. 10 μ sec      
3. 2 μ sec      
4. 5 μ sec
Answer : 1