COMPUTER SYSTEM ARCHITECTURE MCQS PART 32

COMPUTER SYSTEM ARCHITECTURE MCQS PART 32

1. The bit position in a ___________ can be numbered from 1 through 2i-1:
a. Haming code word  
b. Hamming distance word  
c. Both  
d. None of these
Answer A

2. Each check bit is grouped with the information bits as specified by a____________:
a. Parity check code  
b. Parity check matrix 
c. Parity check bit 
d. All of these
Answer B

3. The pattern of groups that have odd parity called the _________must match one of the ofcolumns in the parity check matrix:
a. Syndrome           
b. Dynodes     
c. Both          
d. None of these
Answer A

4. Which are designed to interpret a specified number of instruction code:
a. Programmer        
b. Processors          
c. Instruction       
d. Opcode
Answer B

5. Which code is a string of binary digits:
a. Op code       
b. Instruction code          
c. Parity code          
d. Operand code
Answer B
6. The list of specific instruction supported by the CPU is termed as its ____________:
a. Instruction code       
b. Parity set        
c. Instruction set      
d. None of these
Answer C

7. __________is divided into a number of fields and is represented as a sequence of bits:
a. instruction        
b. instruction set        
c. instruction code        
d. parity code
Answer A

8. Which unit is necessary for the execution of instruction:
a. Timing        
b. Control      
c. Both       
d. None of these
Answer C

9. Which unit provide status , timing and control
signal:
a. Timing and control unit      
b. Memory unit 
c. Chace unit 
d. None of these
Answer A
10. Which unit acts as the brain of the computer which control other peripherals and interfaces:
a. Memory unit       
b. Cache unit  
c. Timing and control unit
d. None of these
Answer C